Answer to @LupusE :
My objective is to use only the flipper zero in order to listen at the radio frame and my sensors canno’t be modified indeed the SPR would not be a solution.
Here the result of my last research :
Custom_preset_name: Test_7
Custom_preset_module: CC1101
Custom_preset_data: 02 0D 03 07 04 66 05 66 17 3F 07 08 08 35 0D 10 0E B0 0F 71 10 90 0B 06 14 00 13 00 12 3A 11 32 18 18 19 18 1D 91 1C 00 1B 07 20 FB 22 01 21 B6 2C 81 2D 35 00 00 00 C0 00 00 00 00 00 00
Again addtitionnal informations : Here a part of the code used for the configuration of the original receiver
#define RADIO_QUARTZ_FREQ (32000000ul)
#define RF_BIT_RATE 4950 //(Hz) Transmitter's raw bit rate
#define SYNC_WORD1 0x66 // SYNC WORD 0xAA cod? en Manchester = 0x6666
#define SYNC_WORD2 0x66 // SYNC WORD
#define CRC_BYTE_POS 6 // CRC Byte position in frame
#define FIFOMAXSIZE 66
#define RADIO_HEADER_SIZE 16 ///< taille de la trame radio avant les OW
#define SX1239_ENABLE 0 ///< Periph?rique actif a l'etat bas
#define SX1239_DISABLE 1
#define SX1239_RESET_ENABLE 1 ///< Reset actif a l'etat haut
#define SX1239_RESET_DISABLE 0
/*==============================================================================
SX1239 CONFIGURATION REGISTERS and bit definitions
===============================================================================*/
//SX1239 addresses
#define REGFIFO_ADDRESS 0x00
#define REGOPMODE_ADDRESS 0x01
#define SX1239_SEQUENCER_FORCED (1 << 7)
#define SX1239_SEQUENCER_AUTO (0 << 7)
#define SX1239_LISTEN_EN (1 << 6) // periodically listens and idles between listening bursts
#define SX1239_LISTEN_DIS (0 << 6) // Always receiving
#define SX1239_LISTEN_ABORT (1 << 5)
#define SX1239_MODE_SLEEP (0b000 << 2)
#define SX1239_MODE_STDBY (0b001 << 2)
#define SX1239_MODE_FS (0b010 << 2)
#define SX1239_MODE_RX (0b100 << 2)
#define REGDATAMODUL_ADDRESS 0x02
#define SX1239_DATAMODE_PACKET (0b00 << 5)
#define SX1239_DATAMODE_CONTINUOUS_SYNC (0b10 << 5)
#define SX1239_DATAMODE_CONTINUOUS_NO_SYNC (0b11 << 5)
#define SX1239_MODULATION_FSK (0b00 << 3)
#define SX1239_MODULATION_OOK (0b01 << 3)
#define REGBITRATEMSB_ADDRESS 0x03
#define REGBITRATELSB_ADDRESS 0x04
#define REGFRFMSB_ADDRESS 0x07
#define REGFRFMID_ADDRESS 0x08
#define REGFRFLSB_ADDRESS 0x09
#define REGVERSION_ADDRESS 0x10
//Receiver Registers
#define REGLNA_ADDRESS 0x18
#define REGRXBW_ADDRESS 0x19
#define SX1239_BW_DCCFREQ_DEFAULT (0b000 << 5)
// #define SX1239_BW_DCCFREQ_DEFAULT (0b010 << 5)
#define SX1239_BW_MANT_16 (0b00 << 3)
#define SX1239_BW_MANT_20 (0b01 << 3)
#define SX1239_BW_MANT_24 (0b10 << 3)
#define SX1239_BW_EXP_0 (0b000)
#define SX1239_BW_EXP_1 (0b001)
#define SX1239_BW_EXP_2 (0b010)
#define SX1239_BW_EXP_3 (0b011)
#define SX1239_BW_EXP_4 (0b100)
#define SX1239_BW_EXP_5 (0b101)
#define SX1239_BW_EXP_6 (0b110)
#define SX1239_BW_EXP_7 (0b111)
#define REGLISTEN1_ADDRESS 0x0D
#define REGLISTEN2_ADDRESS 0x0E
#define REGLISTEN3_ADDRESS 0x0F
/** OOK demodulator selection and control in peak mode */
#define REGOOKPEAK_ADDRESS 0x1B
#define SX1239_THRESH_PEAK_TYPE_FIXED 0
#define SX1239_THRESH_PEAK_TYPE_PEAK 0x40
#define SX1239_THRESH_PEAK_TYPE_AVERAGE 0x80
#define SX1239_THRESH_PEAK_STEP_05dB 0
#define SX1239_THRESH_PEAK_DEC_0 0
#define REGOOKAVG_ADDRESS 0x1C /** Average threshold control of the OOK demodulator */
#define SX1239_THRESH_AVG_2 (0x03 << 6)
#define SX1239_THRESH_AVG_4 (0x02 << 6)
#define SX1239_THRESH_AVG_8 (0x01 << 6)
#define SX1239_THRESH_AVG_32 (0x00 << 6)
#define REGOOKFIX_ADDRESS 0x1D /** Fixed threshold control of the OOK demodulator */
#define REGRSSI_VALUE 0x24
//IRQ and pin mapping Registers
#define REGDIOMAPPING1_ADDRESS 0x25
#define REGDIOMAPPING2_ADDRESS 0x26
#define REGIRQFLAGS1_ADDRESS 0x27
#define IRQFLAGS1_MODE_READY (1 << 7)
#define IRQFLAGS1_RX_READY (1 << 6)
#define IRQFLAGS1_PLL_LOCK (1 << 4)
#define IRQFLAGS1_RSSI (1 << 3)
#define IRQFLAGS1_TIMEOUT (1 << 2)
#define IRQFLAGS1_AUTOMODE (1 << 1)
#define IRQFLAGS1_ADDRMATCH (1 )
#define REGIRQFLAGS2_ADDRESS 0x28 // Page 62
#define IRQFLAGS2_FIFOFULL (1 << 7)
#define IRQFLAGS2_FIFONOTEMPTY (1 << 6)
#define IRQFLAGS2_FIFOLEVEL (1 << 5)
#define IRQFLAGS2_FIFOOVERRUN (1 << 4)
#define IRQFLAGS2_PAYLOADREADY (1 << 2)
#define IRQFLAGS2_CRCOK (1 << 1)
#define IRQFLAGS2_LOWBAT (1 )
#define REGRSSITHRESH_ADDRESS 0x29
#define REGRXTIMEOUT1_ADDRESS 0x2A
#define REGRXTIMEOUT2_ADDRESS 0x2B
//Packet Engine Registers
/** Sync word configuration */
#define REGSYNCCONFIG_ADDRESS 0x2E
#define SX1239_SYNC_EN (1 << 7)
#define SX1239_SYNC_DIS (0 << 7)
#define SX1239_FILL_ON_MATCH (0 << 6)
#define SX1239_FILL_FIFO (1 << 6)
#define SX1239_SYNC_SIZE_1 (0 << 3)
#define SX1239_SYNC_SIZE_2 (1 << 3)
#define SX1239_SYNC_SIZE_3 (2 << 3)
#define SX1239_SYNC_SIZE_4 (3 << 3)
#define SX1239_SYNC_SIZE_5 (4 << 3)
#define SX1239_SYNC_SIZE_6 (5 << 3)
#define SX1239_SYNC_SIZE_7 (6 << 3)
#define SX1239_SYNC_SIZE_8 (7 << 3)
#define SX1239_SYNC_TOL_0 (0 << 0) // No bit error tolerated in Sync word
#define REGSYNCVALUE1_ADDRESS 0x2F
#define REGSYNCVALUE2_ADDRESS 0x30
#define REGSYNCVALUE3_ADDRESS 0x31
#define REGSYNCVALUE4_ADDRESS 0x32
#define REGSYNCVALUE5_ADDRESS 0x33
#define REGSYNCVALUE6_ADDRESS 0x34
#define REGSYNCVALUE7_ADDRESS 0x35
#define REGSYNCVALUE8_ADDRESS 0x36
#define REGPACKETCONFIG1_ADDRESS 0x37
#define SX1239_PACKET_FIXED_LEN (0 << 7)
#define SX1239_PACKET_VAR_LEN (1 << 7)
#define SX1239_DCFREE_OFF (0 << 5)
#define SX1239_MANCHESTER (1 << 5)
#define SX1239_WHITENING (2 << 5)
#define SX1239_CRC_CHECK (1 << 4)
#define SX1239_CRC_AUTO_CLEAR_OFF (1 << 3)
#define SX1239_ADDRESS_FILTER_OFF (0 << 1)
#define REGPAYLOADLENGTH_ADDRESS 0x38
#define REGFIFOTHRESH_ADDRESS 0x3C
#define REGPACKETCONFIG2_ADDRESS 0x3D
/*==============================================================================
SX1239 CONFIGURATION DATA
===============================================================================*/
/*******************************************************
* RECEIVER MODE
******************************************************/
/** Default value for the RegOpMode register */
#define SX1239_OPMODE_ANS (SX1239_SEQUENCER_AUTO + SX1239_LISTEN_DIS + SX1239_MODE_RX)
/** Stdby value for the RegOpMode register */
#define SX1239_OPMODE_SLEEP (SX1239_SEQUENCER_FORCED + SX1239_LISTEN_DIS + SX1239_MODE_SLEEP)
/*******************************************************
* MODULATION
******************************************************/
/** Fifo value for the RegDataModul register */
#define SX1239_DATAMODE_ANS (SX1239_DATAMODE_PACKET | SX1239_MODULATION_OOK)
/*******************************************************
* CENTER FREQUENCY
******************************************************/
#define SX1239_FREQUENCY_31500 0x4EC000
#define SX1239_FREQUENCY_39000 0x618000
#define SX1239_FREQUENCY_43392 0x6C7AE1
#define SX1239_FREQUENCY_86830 0xD91333
#define SX1239_FREQUENCY_86832 0xD9147B
#define SX1239_FREQUENCY_91500 0xE4C000
/** Default value for the RegFrfMsb, RegFrfMid, and RegFrfLsb registers */
#define SX1239_FREQ_ANS (SX1239_FREQUENCY_43392)
/*******************************************************
* SYNC detection
******************************************************/
/** FIFO value for RegSyncConfig register */
#define SX1239_SYNC_ANS ( SX1239_SYNC_EN | SX1239_FILL_ON_MATCH | SX1239_SYNC_SIZE_2 )
/***************************************************;****
* RX BANDWIDTH
******************************************************/
/** Default value for RegRxBw Register */
#define SX1239_RXBW_ANS (SX1239_BW_DCCFREQ_DEFAULT + SX1239_BW_MANT_24 + SX1239_BW_EXP_0)
/*******************************************************
* RSSI THRESHOLD
******************************************************/
/** Default value for RegRssiThresh register */
#define SX1239_RSSI_THRESH_PEAK_ANS (0xE4)
/*******************************************************
* LNA'S INPUT IMPEDANCE
******************************************************/
/** Default value for LNA's impute impedance register */
#define SX1239_LNA_INPUT_IMPEDANCE_50_OHM (0x00)
/*******************************************************
* PACKET CONFIG 1
******************************************************/
#define SX1239_PACKETCONFIG1_ANS (SX1239_PACKET_VAR_LEN | SX1239_MANCHESTER | SX1239_ADDRESS_FILTER_OFF | SX1239_CRC_CHECK)
/*******************************************************
* REGOOKPEAK
******************************************************/
/** Default value for the RegOokPeak register */
#define SX1239_OOK_PEAK_ANS (SX1239_THRESH_PEAK_TYPE_AVERAGE + SX1239_THRESH_PEAK_STEP_05dB + SX1239_THRESH_PEAK_DEC_0)
/*******************************************************
* REGOOKAVG
******************************************************/
/** Default value for the RegOokAvg register */
#define SX1239_THRESH_AVG_ANS (SX1239_THRESH_AVG_32)
I’m closer but its not ended yet !